The common solution for driving an analog signal from an integrated circuit (IC) into an external load is a unity gain buffer circuit. Unity gain buffer circuits generally consist of an emitter follower buffer transistor and a current mirror circuit. The current mirror circuit is itself usually two transistors, a current source transistor coupled to a reference transistor, where the current source transistor provides a bias current for the emitter follower buffer transistor.
In a system where an analog signal is driven from an IC into an external load, available supply power is often limited. For example, in a circuit operating from a battery power supply, reduced power requirements are desired. A class A emitter follower buffer circuit requires a bias current equal to the peak output current to prevent clipping of the output waveform during the negative half-wave of a signal. The bias current is constant for both the positive and negative half-waves of the input signal, causing unnecessary power dissipation.
For an emitter follower unity gain buffer circuit, the output current driving capability is asymmetric. During the positive half of a signal input into the buffer transistor, the output voltage and current of the buffer transistor increase. Because the output impedance of the buffer transistor is very low, the output voltage from the buffer transistor is almost identical to the input voltage and a very high peak output current can be supplied to the load. However, during a negative half of a signal input into the buffer transistor, the emitter follower unity gain buffer circuit must sink the current that flows from the load back into the output node of the buffer circuit. The maximum sink current is limited to the magnitude of the bias current supplied by the current source device. Therefore, when a symmetrical waveform is required by the load, the maximum output current cannot exceed the bias current supplied by the current source device.